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TC1303A/TC1303B/ TC1303C/TC1304
500 mA Synchronous Buck Regulator, + 300 mA LDO with Power-Good Output
Features
* Dual-Output Regulator (500 mA Buck Regulator and 300 mA Low-Dropout Regulator) * Power-Good Output with 300 ms Delay * Total Device Quiescent Current = 65 A, Typical * Independent Shutdown for Buck and LDO Outputs (TC1303) * Both Outputs Internally Compensated * Synchronous Buck Regulator: - Over 90% Typical Efficiency - 2.0 MHz Fixed-Frequency PWM (Heavy Load) - Low Output Noise - Automatic PWM to PFM mode transition - Adjustable (0.8V to 4.5V) and Standard Fixed-Output Voltages (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V) * Low-Dropout Regulator: - Low-Dropout Voltage = 137 mV Typical @ 200 mA - Standard Fixed-Output Voltages (1.5V, 1.8V, 2.5V, 3.3V) * Power-Good Function: - Monitors Buck Output Function (TC1303A) - Monitors LDO Output Function (TC1303B) - Monitors Both Buck and LDO Output Functions (TC1303C and TC1304) - 300 ms Delay Used for Processor Reset * Sequenced Startup and Shutdown (TC1304) * Small 10-pin 3x3 DFN or MSOP Package Options * Operating Junction Temperature Range: - -40C to +125C * Undervoltage Lockout (UVLO) * Output Short Circuit Protection * Overtemperature Protection
Description
The TC1303/TC1304 combines a 500 mA synchronous buck regulator and 300 mA Low-Dropout Regulator (LDO) with a power-good monitor to provide a highly integrated solution for devices that require multiple supply voltages. The unique combination of an integrated buck switching regulator and low-dropout linear regulator provides the lowest system cost for dual-output voltage applications that require one lower processor core voltage and one higher bias voltage. The 500 mA synchronous buck regulator switches at a fixed frequency of 2.0 MHz when the load is heavy, providing a low noise, small-size solution. When the load on the buck output is reduced to light levels, it changes operation to a Pulse Frequency Modulation (PFM) mode to minimize quiescent current draw from the battery. No intervention is necessary for smooth transition from one mode to another. The LDO provides a 300 mA auxiliary output that requires a single 1 F ceramic output capacitor, minimizing board area and cost. The typical dropout voltage for the LDO output is 137 mV for a 200 mA load. For the TC1303/TC1304, the power-good output is based on the regulation of the buck regulator output, the LDO output or the combination of both. The TC1304 features start-up and shutdown output sequencing. The TC1303/TC1304 is available in either the 10-pin DFN or MSOP package. Additional protection features include: UVLO, overtemperature and overcurrent protection on both outputs. For a complete listing of TC1303/TC1304 standard parts, consult your Microchip representative.
Applications
* * * * * Cellular Phones Portable Computers USB-Powered Devices Handheld Medical Instruments Organizers and PDAs
(c) 2008 Microchip Technology Inc.
DS21949C-page 1
TC1303A/TC1303B/TC1303C/TC1304
Package Types
TC1303A,B,C 10-Lead DFN SHDN2 1 VIN2 2 VOUT2 3 PG 4 AGND 5 EP 11 10 PGND 9 LX 8 VIN1 7 SHDN1 6 VFB1/VOUT1 SHDN2 1 VIN2 2 VOUT2 3 PG 4 AGND 5 10-Lead MSOP 10 PGND 9 LX 8 VIN1 7 SHDN1 6 VFB1/VOUT1
TC1304 10-Lead DFN SHDN 1 VIN2 2 VOUT2 3 PG 4 AGND 5 EP 11 10 PGND 9 LX 8 VIN1 7 AGND 6 VFB1/VOUT1 SHDN 1 VIN2 2 VOUT2 3 PG 4 AGND 5 10-Lead MSOP 10 PGND 9 LX 8 7 VIN1 AGND VFB1/VOUT1 6
DS21949C-page 2
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram - TC1303
VREF
Undervoltage Lockout (UVLO)
UVLO
Synchronous Buck Regulator VIN1 PDRV LX SHDN1 Control Driver NDRV PGND PGND VOUT1/VFB1
VIN2
PGND AGND
Sense Switcher for A,C
PG TC1303A(1),B(2),C(1) options PG Generator with Delay VREF Sense LDO for B,C
UVLO VOUT2 LDO SHDN2 AGND
Note 1: PG open-drain for A,C options 2: PG push-pull output for B option
(c) 2008 Microchip Technology Inc.
DS21949C-page 3
TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram - TC1304
VREF
Undervoltage Lockout (UVLO)
UVLO
Synchronous Buck Regulator VIN1 PDRV LX SHDN Control Driver NDRV PGND PGND VOUT1/VFB1
VIN2
PGND AGND
PG
Output Voltage Sequencer ckt.
TC1304(Note) PG Generator with Delay
AGND
VREF
UVLO VOUT2 LDO AGND
Note:
PG open-drain for TC1304
DS21949C-page 4
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Typical Application Circuits
TC1303A Fixed-Output Application 10-Lead MSOP
VIN 2.7V to 4.2V 4.7 F 4.7 H 8 2 7 1 RPULLUP Processor RESET 4 VIN1 VIN2 SHDN1 SHDN2 PG LX VOUT1 VOUT2 AGND 9 4.7 F PGND 10 6 3 5 1 F VOUT2 2.5V @ 300 mA VOUT1 1.5V @ 500 mA
TC1303B Adjustable-Output Application 10-Lead DFN
Input Voltage 4.5V to 5.5V *Optional Capacitor VIN2 1.0 F VIN1 4.7 F VIN2 SHDN1 SHDN2 PG Processor RESET 8 2 7 1 4 EP 11 9 10 6 3 LX PGND VOUT1 VOUT2 1 F 4.7 H 4.7 F 200 k VOUT2 3.3V @ 300 mA 4.99 k 33 pF 121 k VOUT1 2.1V @ 500 mA
5 AGND (Note)
Note: Connect DFN package exposed pad to AGND.
TC1304 Fixed-Output Application 10-Lead MSOP
VIN 2.7V to 4.2V 4.7 F 4.7 H 8 2 7 1 RPULLUP Processor RESET 4 VIN1 VIN2 AGND SHDN PG LX VOUT1 VOUT2 AGND 9 4.7 F PGND 10 6 3 5 1 F VOUT2 2.5V @ 300 mA VOUT1 1.2V @ 500 mA
(c) 2008 Microchip Technology Inc.
DS21949C-page 5
TC1303A/TC1303B/TC1303C/TC1304
NOTES:
DS21949C-page 6
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
1.0 ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings
VIN - AGND.......................................................................6.0V All Other I/O ...............................(AGND - 0.3V) to (VIN + 0.3V) LX to PGND...............................................-0.3V to (VIN + 0.3V) PGND to AGND .................................................. -0.3V to +0.3V Output Short Circuit Current ................................ Continuous Power Dissipation (Note 7) .......................... Internally Limited Storage temperature .....................................-65C to +150C Ambient Temp. with Power Applied ................-40C to +85C Operating Junction Temperature...................-40C to +125C ESD protection on all pins (HBM) ....................................... 3 kV
DC CHARACTERISTICS
Electrical Characteristics: VIN1 =VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, IOUT1 = 100 mA, IOUT2 = 0.1 mA TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. Parameters Input/Output Characteristics Input Voltage Maximum Output Current Maximum Output Current Shutdown Current Combined VIN1 and VIN2 Current TC1303A,B Operating IQ TC1303C, TC1304 Operating IQ Synchronous Buck IQ LDO IQ SHDN1,SHDN2, SHDN (TC1304) Logic Input Voltage Low SHDN1,SHDN2, SHDN (TC1304) Logic Input Voltage High SHDN1,SHDN2, SHDN (TC1304) Input Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis Undervoltage Lockout (VOUT1 and VOUT2) Undervoltage Lockout Hysteresis Note 1: 2: 3: 4: 5: 6: VIL VIH IIN VIN IOUT1_MAX IOUT2_MAX IIN_SHDN IQ IQ 2.7 500 300 -- -- -- -- -- 45 -1.0 -- -- -- 0.05 65.0 70.1 38 46 -- -- 0.01 5.5 -- -- 1 110 110 -- -- 15 -- 1.0 V mA mA A A A A %VIN %VIN A Note 1, Note 2, Note 8 Note 1 Note 1 SHDN1 = SHDN2 = GND SHDN1 = SHDN2 = VIN2 IOUT1 = 0 mA, IOUT2 = 0 mA SHDN1 = VIN, SHDN2 = GND SHDN1 = GND, SHDN2 = VIN2 VIN1 =VIN2 = 2.7V to 5.5V VIN1 =VIN2 = 2.7V to 5.5V VIN1 =VIN2 = 2.7V to 5.5V SHDNX = GND SHDNY = VIN Note 6, Note 7 VIN1 Falling Sym Min Typ Max Units Conditions
Shutdown/UVLO/Thermal Shutdown Characteristics
TSHD TSHD-HYS UVLO UVLO-HYS
-- -- 2.4 --
165 10 2.55 200
-- -- 2.7 --
C C V mV
7:
8:
The Minimum VIN has to meet two conditions: VIN 2.7V and VIN VRX + VDROPOUT, VRX = VR1 or VR2. VRX is the regulator output voltage setting. TCVOUT2 = ((VOUT2max - VOUT2min) * 106)/(VOUT2 * DT). Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested over a load range from 0.1 mA to the maximum specified output current. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, JA). Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not able to limit the junction temperature for these cases. VIN1 and VIN2 are supplied by the same input source.
(c) 2008 Microchip Technology Inc.
DS21949C-page 7
TC1303A/TC1303B/TC1303C/TC1304
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: VIN1 =VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, IOUT1 = 100 mA, IOUT2 = 0.1 mA TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. Parameters Adjustable Output Voltage Range Adjustable Reference Feedback Voltage (VFB1) Feedback Input Bias Current (IFB1) Output Voltage Tolerance Fixed (VOUT1) Line Regulation (VOUT1) Load Regulation (VOUT1) Dropout Voltage VOUT1 Internal Oscillator Frequency Start Up Time RDSon P-Channel RDSon N-Channel LX Pin Leakage Current Positive Current Limit Threshold LDO Output (VOUT2) Output Voltage Tolerance (VOUT2) Temperature Coefficient Line Regulation Load Regulation, VOUT2 2.5V Load Regulation, VOUT2 < 2.5V Dropout Voltage VOUT2 > 2.5V Power Supply Rejection Ratio Output Noise Note 1: 2: 3: 4: 5: 6: VOUT2 TCVOUT VOUT2/ VIN VOUT2/ IOUT2 VOUT2/ IOUT2 VIN - VOUT2 PSRR eN -2.5 -- -0.2 -0.75 -0.9 -- -- -- 0.3 25 0.02 -0.08 -0.18 137 205 62 1.8 +2.5 -- +0.2 +0.75 +0.9 300 500 -- -- % ppm/C %/V % % mV dB V/(Hz)1/2 Note 2 Note 3 (VR+1V) VIN 5.5V IOUT2 = 0.1 mA to 300 mA (Note 4) IOUT2 = 0.1 mA to 300 mA (Note 4) IOUT2 = 200 mA (Note 5) IOUT2 = 300 mA f 100 Hz, IOUT1 = IOUT2 = 50 mA, CIN = 0 F f 1 kHz, IOUT2 = 50 mA, SHDN1 = GND Sym VOUT1 VFB1 IVFB1 VOUT1 VLINE-REG VLOAD-REG VIN - VOUT1 FOSC TSS RDSon-P RDSon-N ILX +ILX(MAX) Min 0.8 0.78 -- -2.5 -- -- -- 1.6 -- -- -- -1.0 -- Typ -- 0.8 -1.5 0.3 0.2 0.2 280 2.0 0.5 450 450 0.01 700 Max 4.5 0.82 -- +2.5 -- -- -- 2.4 -- -- -- 1.0 -- Units V V nA % %/V % mV MHz ms m m A mA TR = 10% to 90% IP=100 mA IN=100 mA SHDN = 0V, VIN = 5.5V, LX = 0V, LX = 5.5V Note 2 VIN =VR+1V to 5.5V, ILOAD = 100 mA VIN = VR + 1.5V, ILOAD = 100 mA to 500 mA (Note 1) IOUT1 = 500 mA, VOUT1 = 3.3V (Note 5) Conditions Synchronous Buck Regulator (VOUT1)
7:
8:
The Minimum VIN has to meet two conditions: VIN 2.7V and VIN VRX + VDROPOUT, VRX = VR1 or VR2. VRX is the regulator output voltage setting. TCVOUT2 = ((VOUT2max - VOUT2min) * 106)/(VOUT2 * DT). Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested over a load range from 0.1 mA to the maximum specified output current. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, JA). Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not able to limit the junction temperature for these cases. VIN1 and VIN2 are supplied by the same input source.
DS21949C-page 8
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: VIN1 =VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, IOUT1 = 100 mA, IOUT2 = 0.1 mA TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. Parameters Output Short Circuit Current (Average) Wake-Up Time (From SHDN2 mode), (VOUT2) Settling Time (From SHDN2 mode), (VOUT2) Power-Good (PG) Voltage Range PG VPG 1.0 1.2 -- 89 -- -- -- 140 -- 5.5 5.5 96 -- -- -- -- 560 V TA = 0C to +70C TA = -40C to +85C VIN 2.7 ISINK = 100 A On Rising VOUT1 or VOUT2 VOUTX = VOUT1 or VOUT2 On Falling VOUT1 or VOUT2 VOUTX = VOUT1 or VOUT2 VOUTX = VOUT1 or VOUT2 Sym IOUTsc2 tWK tS Min -- -- -- Typ 240 31 100 Max -- 100 -- Units mA s s Conditions RLOAD2 1 IOUT1 = IOUT2 = 50 mA IOUT1 = IOUT2 = 50 mA
PG Threshold High (VOUT1 or VOUT2) PG Threshold Low (VOUT1 or VOUT2) PG Threshold Hysteresis (VOUT1 and VOUT2) PG Threshold Tempco PG Delay PG Active Time-out Period
VTH_H VTH_L VTH_HYS VTH/T tRPD tRPU
94 92 2 30 165 262
% of VOUTX % of VOUTX % of VOUTX ppm/C s ms
VOUT1 or VOUT2 = (VTH + 100 mV) to (VTH - 100 mV) VOUT1 or VOUT2 = VTH - 100 mV to VTH + 100 mV, ISINK = 1.2 mA VOUT1 or VOUT2 = VTH - 100 mV, IPG= 1.2 mA VIN2 > 2.7V IPG = 100 A, 1.0V < VIN2 < 2.7V VOUT1 or VOUT2 = VTH + 100 mV VOUT2 1.8V, IPG = - 500 A VOUT2 < 1.8V,IPG = - 300 A
PG Output Voltage Low
PG_VOL
--
--
0.2
V
PG Output Voltage High (TC1303B only) Note 1: 2: 3: 4: 5: 6:
PG_VOH
0.9* VOUT2
--
--
V
7:
8:
The Minimum VIN has to meet two conditions: VIN 2.7V and VIN VRX + VDROPOUT, VRX = VR1 or VR2. VRX is the regulator output voltage setting. TCVOUT2 = ((VOUT2max - VOUT2min) * 106)/(VOUT2 * DT). Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested over a load range from 0.1 mA to the maximum specified output current. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, JA). Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not able to limit the junction temperature for these cases. VIN1 and VIN2 are supplied by the same input source.
(c) 2008 Microchip Technology Inc.
DS21949C-page 9
TC1303A/TC1303B/TC1303C/TC1304
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VIN = +2.7V to +5.5V Parameters Temperature Ranges Operating Junction Temperature Range Storage Temperature Range Maximum Junction Temperature Thermal Package Resistances Thermal Resistance, 10L-DFN JA -- 41 -- C/W Typical 4-layer Board with Internal Ground Plane and 2 Vias in Thermal Pad C/W Typical 4-layer Board with Internal Ground Plane TJ TA TJ -40 -65 -- -- -- -- +125 +150 +150 C C C Transient Steady state Sym Min Typ Max Units Conditions
Thermal Resistance, 10L-MSOP
JA
--
113
--
DS21949C-page 10
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
80 IQ Switcher and LDO (A) 76
VIN = 5.5V
IOUT1 = IOUT2 = 0 mA
SHDN1 = VIN2 SHDN2 = VIN2
55 50 IQ LDO (A) 45
IOUT2 = 0 mA
VIN = 5.5V
72 68 64 60 -40 -25 -10 5
VIN = 4.2V
VIN = 4.2V VIN = 3.6V
40 35 30
SHDN1 = AGND SHDN2 = VIN2
VIN = 3.6V
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (C)
Ambient Temperature (C)
FIGURE 2-1: IQ Switcher and LDO Current vs. Ambient Temperature (TC1303A,B).
78 IQ Switcher and LDO (A) 76 74 72 70 68 66 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (C)
SHDN1 = VIN2 SHDN2 = VIN2 VIN = 5.5V
FIGURE 2-4: Temperature.
100 95 90 85 80 75 70 65 60 55 50 2.7
IQ LDO Current vs. Ambient
VOUT1 Efficiency (%)
IOUT1 = 100 mA
SHDN1 = VIN2 SHDN2 = AGND
VIN = 4.2V VIN = 3.6V
IOUT1 = 250 mA IOUT1 = 500 mA
3.05
3.4
3.75
4.1
4.45
4.8
5.15
5.5
Input Voltage (V)
FIGURE 2-2: IQ Switcher and LDO Current vs. Ambient Temperature (TC1303C, TC1304).
55 50 45 40
VIN = 4.2V SHDN1 = VIN2 SHDN2 = AGND
FIGURE 2-5: VOUT1 Output Efficiency vs. Input Voltage (VOUT1 = 1.2V).
IOUT1 = 0 mA
100 VOUT1 Efficiency(%) 95 90 85 80 75 70 0.005
VIN = 5.5V
SHDN1 = VIN2 SHDN2 = AGND
IQ Switcher (A)
VIN1 = 3.6V VIN1 = 4.2V VIN1 = 3.0V
35 30 -40 -25 -10 5
VIN = 3.6V
20 35 50 65 80 95 110 125
0.104
0.203
0.302
0.401
0.5
Ambient Temperature (C)
IOUT1 (A)
FIGURE 2-3: IQ Switcher Current vs. Ambient Temperature.
FIGURE 2-6: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 1.2V).
(c) 2008 Microchip Technology Inc.
DS21949C-page 11
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
100 95 VOUT1 Efficiency(%) 90 85 80 75 70 65 60 2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 Input Voltage (V)
IOUT1 = 250 mA IOUT1 = 500 mA IOUT1 = 100 mA
SHDN1 = VIN2 SHDN2 = AGND
100 VOUT1 Efficiency (%) 95 90 85 80 75 70 65
VIN1 = 3.6V
VIN1 = 4.2V VIN1 = 5.5V
SHDN1 = VIN2 SHDN2 = AGND
60 0.005
0.104
0.203
0.302
0.401
0.5
IOUT1 (A)
FIGURE 2-7: VOUT1 Output Efficiency vs. Input Voltage (VOUT1 = 1.8V).
100 VOUT1 Efficiency(%) 95 90 85 80 75 0.005
VIN = 3.6V VIN = 3.0V
FIGURE 2-10: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 3.3V).
1.21 1.206 VOUT1 (V) 1.202 1.198 1.194 1.19 0.005
VIN1 = 3.6V
SHDN1 = VIN2 SHDN2 = AGND
SHDN1 = VIN2 SHDN2 = AGND
VIN = 4.2V
0.104
0.203
0.302
0.401
0.5
0.104
0.203
0.302
0.401
0.5
IOUT1 (A)
IOUT1 (A)
FIGURE 2-8: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 1.8V).
100 VOUT1 Efficiency (%) 96 92 88
IOUT1 = 500 mA IOUT1 = 100 mA SHDN1 = VIN2 SHDN2 = AGND
FIGURE 2-11: (VOUT1 = 1.2V).
1.82 1.815 VOUT1 (V) 1.81 1.805 1.8 1.795 1.79 0.005
VOUT1 vs. IOUT1
VIN1 = 3.6V
SHDN1 = VIN2 SHDN2 = AGND
IOUT1 = 250 mA
84 80 3.60
3.92
4.23
4.55
4.87
5.18
5.50
0.104
0.203
0.302
0.401
0.5
Input Voltage (V)
IOUT1 (A)
FIGURE 2-9: VOUT1 Output Efficiency vs. Input Voltage (VOUT1 = 3.3V).
FIGURE 2-12: (VOUT1 = 1.8V).
VOUT1 vs. IOUT1
DS21949C-page 12
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
3.4 3.36 VOUT1 (V) 3.32 3.28 3.24 3.2 0.005
VIN1 = 4.2V
VOUT1 FB Voltage (V)
SHDN1 = VIN2 SHDN2 = AGND
0.820 0.815
VIN1 = 3.6V
SHDN1 = VIN2 SHDN2 = AGND
0.810 0.805 0.800 0.795 0.790 5 20 35 50 65 80 -40 -25 -10 95 110 125
0.104
0.203
0.302
0.401
0.5
IOUT1 (A)
Ambient Temperature (C)
FIGURE 2-13: (VOUT1 = 3.3V).
2.20 VOUT1 Frequency (MHz) 2.15 2.10 2.05 2.00 1.95 1.90 2.7 3.1
VOUT1 vs. IOUT1
FIGURE 2-16: VOUT1 Adjustable Feedback Voltage vs. Ambient Temperature.
0.6 0.55 0.5 0.45
N-Channel TA = 25 C
VOUT1 Switch Resistance ()
SHDN1 = VIN2 SHDN2 = AGND
SHDN1 = VIN2 SHDN2 = AGND
0.4 0.35 0.3 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 Input Voltage (V)
P-Channel
3.5
3.9
4.3
4.7
5.1
5.5
Input Voltage (V)
FIGURE 2-14: vs. Input Voltage.
2.00 VOUT1 Frequency (MHz) 1.98 1.96 1.94 1.92 1.90 -40 -25 -10
VOUT1 Switching Frequency
FIGURE 2-17: vs. Input Voltage.
0.65 0.6 0.55 0.5 0.45 0.4 0.35 0.3
VOUT1 Switch Resistance
SHDN1 = VIN2 SHDN2 = AGND
VOUT1 Switch Resistance ()
VIN1 = 3.6V
SHDN1 = VIN2 SHDN2 = AGND P-Channel N-Channel
5
20
35
50
65
80
95
110
125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (C)
Ambient Temperature (C)
FIGURE 2-15: VOUT1 Switching Frequency vs. Ambient Temperature.
FIGURE 2-18: VOUT1 Switch Resistance vs. Ambient Temperature.
(c) 2008 Microchip Technology Inc.
DS21949C-page 13
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
0.4 VOUT1 Dropout Voltage (V) 0.35 0.3 0.25 0.2 0.15 0.1 5 20 35 50 65 80 -40 -25 -10 95 110 125
VOUT1 = 3.3V IOUT1 = 500 mA
VOUT2 Output Voltage(V)
SHDN1 = VIN2 SHDN2 = AGND
1.492 1.49 1.488 1.486 1.484 1.482
IOUT2 = 150 mA TA = + 85C
TA = + 25C SHDN1 = AGND SHDN2 = VIN2 TA = - 40C
2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 Input Voltage (V)
Ambient Temperature (C)
FIGURE 2-19: VOUT1 Dropout Voltage vs. Ambient Temperature.
FIGURE 2-22: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 1.5V).
1.802 VOUT2 Output Voltage (V) 1.800 1.798 1.796 1.794 1.792 2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 Input Voltage (V)
TA = - 40C
IOUT2 = 150 mA TA = + 85C TA = + 25C
SHDN1 = AGND SHDN2 = VIN2
FIGURE 2-20: VOUT1 and VOUT2 Heavy Load Switching Waveforms vs. Time.
FIGURE 2-23: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 1.8V).
2.508 VOUT2 Output Voltage (V) 2.506 2.504 2.502 2.500 2.498 2.496 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 Input Voltage (V)
TA = - 40C TA = + 85C SHDN1 = AGND SHDN2 = VIN2
IOUT2 = 150 mA
TA = + 25C
FIGURE 2-21: VOUT1 and VOUT2 Light Load Switching Waveforms vs. Time.
FIGURE 2-24: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 2.5V).
DS21949C-page 14
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
3.298 VOUT2 Output Voltage (V) 3.297 3.296 3.295 3.294 3.293 3.292 3.60
TA = - 40C TA = + 85C
VOUT2 Line Regulation (%/V)
IOUT2 = 150 mA
SHDN1 = AGND SHDN2 = VIN2
0.005 0.000 -0.005 -0.010 -0.015 -0.020 -0.025 -0.030 -0.035
-40 -25 -10 5
VOUT2 = 3.3V
SHDN1 = AGND SHDN2 = VIN2
IOUT2 = 100 A VOUT2 = 2.5V
TA = + 25C
VOUT2 = 1.5V
3.92
4.23
4.55
4.87
5.18
5.50
20 35 50 65 80 95 110 125
Input Voltage (V)
Ambient Temperature (C)
FIGURE 2-25: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 3.3V).
0.30 VOUT2 Dropout Voltage (V) 0.25 0.20 0.15 0.10 0.05 -40 -25 -10 5 20 35 50 65 80 95 110 125
IOUT2 = 200 mA IOUT2 = 300 mA SHDN1 = AGND SHDN2 = VIN2
FIGURE 2-28: VOUT2 Line Regulation vs. Ambient Temperature.
0.1 0.0 -0.1 -0.2 -0.3 -0.4 -40 -25 -10 5 20 35 50 65 80 95 110 125
VOUT2 = 1.5V VOUT2 = 2.6V
VOUT2 Load Regulation (%)
VIN2 = 3.6V VOUT2 = 3.3V
SHDN1 = AGND SHDN2 = VIN2
Ambient Temperature (C)
Ambient Temperature (C)
FIGURE 2-26: VOUT2 Dropout Voltage vs. Ambient Temperature (VOUT2 = 2.5V).
0.3 VOUT2 Dropout Voltage (V)
FIGURE 2-29: VOUT2 Load Regulation vs. Ambient Temperature.
350 325 300 275 250 225 200 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient temperature (C)
0.2
IOUT2 = 300 mA
0.1
IOUT2 = 200 mA
0.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (C)
FIGURE 2-27: VOUT2 Dropout Voltage vs. Ambient Temperature (VOUT2 = 3.3V).
FIGURE 2-30: PG Active Delay Time-out vs. Ambient Temperature.
(c) 2008 Microchip Technology Inc.
PG Active Delay Time (ms)
SHDN1 = AGND SHDN2 = VIN2
VIN = 3.6V
SHDN1 = VIN2 SHDN2 = VIN2
DS21949C-page 15
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
96 95 94 93 92 91 90 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (C)
PG Threshold Low PG Threshold Hi
PG Threshold (% of VOUT2)
VIN = 3.6V
SHDN1 = VIN2 SHDN2 = VIN2
0 -10 VOUT2 PSRR (dB) -20 -30 -40 -50 -60 -70
SHDN1 = GND VOUT2 = 1.5V IOUT2 = 30 mA CIN = 0 F
COUT2 = 1.0 F
COUT2 = 4.7 F
-80 0.01
0.1
1
10
100
1000
Frequency (kHz)
FIGURE 2-31: PG Threshold Voltage vs. Ambient Temperature.
0.02 0.018 PG VOL (V) 0.016 0.014 0.012 0.01 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (C)
IOL = 1.2 mA
FIGURE 2-34: VOUT2 Power Supply Ripple Rejection vs. Frequency.
10 VOUT2 Noise (V/Hz)
VIN = 3.6V
SHDN1 = VIN2 SHDN2 = VIN2
SHDN1 = AGND SHDN2 = VIN2
1
0.1
VIN = 3.6V VOUT2 = 2.5V IOUT2 = 50 mA
0.01 0.01
0.1
1
10
100
1000
10000
Frequency (kHz)
FIGURE 2-32: PG Output Voltage Level Low vs. Ambient Temperature.
3.0 2.5
VOUT2 = 2.5V VOUT2 = 2.8V
FIGURE 2-35:
VOUT2 Noise vs. Frequency.
PG VOH (V)
2.0 1.5 1.0 0.5 0.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (C)
VIN = 3.6V IOH = 500 A VOUT2 = 1.5V
SHDN1 = VIN2 SHDN2 = VIN2
FIGURE 2-33: PG Output Voltage Level High vs. Ambient Temperature.
FIGURE 2-36: vs. Time.
VOUT1 Load Step Response
DS21949C-page 16
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
FIGURE 2-37: vs. Time.
VOUT2 Load Step Response
FIGURE 2-40: Waveforms.
VOUT1 and VOUT2 Shutdown
FIGURE 2-38: VOUT1 and VOUT2 Line Step Response vs. Time.
FIGURE 2-41:
Power-Good Output Timing.
FIGURE 2-39: Waveforms.
VOUT1 and VOUT2 Start-up
FIGURE 2-42: (TC1304).
Start-up Waveforms
(c) 2008 Microchip Technology Inc.
DS21949C-page 17
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 F, COUT2 = 1 F, L = 4.7 H, VOUT1 (ADJ) = 1.8V, TA = +25C. Boldface specifications apply over the TA range of -40C to +85C. TA = +25C. Adjustable- or fixedoutput voltage options can be used to generate the Typical Performance Characteristics.
FIGURE 2-43: (TC1304).
Shutdown Waveforms
DS21949C-page 18
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Symbol
Pin No.
TC1303
TC1304
Description
MSOP, DFN MSOP, DFN 1 1 2 3 4 5 6 7 7 8 9 10 11 SHDN2 -- VIN2 VOUT2 PG AGND VFB/VOUT1 SHDN1 -- VIN1 LX PGND EP -- SHDN VIN2 VOUT2 PG AGND VFB/VOUT1 -- AGND VIN1 LX PGND EP Active Low Shutdown Input for LDO Output Pin Active Low Shutdown Input both Buck Regulator Output and LDO Output. Initiates sequencing up and down Analog Input Supply Voltage Pin LDO Output Voltage Pin Power-Good Output Pin Analog Ground Pin Buck Feedback Voltage (Adjustable Version) / Buck Output Voltage (Fixed Version) Pin Active Low Shutdown Input for Buck Regulator Output Pin Analog Ground Pin Buck Regulator Input Voltage Pin Buck Inductor Output Pin Power Ground Pin Exposed Pad - For the DFN package, the center exposed pad is a thermal path to remove heat from the device. Electrically this pad is at ground potential and should be connected to AGND.
3.1
TC1303 LDO Shutdown Input Pin (SHDN2)
3.4
LDO Output Voltage Pin (VOUT2)
SHDN2 is a logic-level input used to turn the LDO Regulator on and off. A logic-high (> 45% of VIN), will enable the regulator output. A logic-low (< 15% of VIN) will ensure that the output is turned off.
VOUT2 is a regulated LDO output voltage pin. Connect a 1 F or larger capacitor to VOUT2 and AGND for proper operation.
3.5
Power-Good Output Pin (PG)
3.2
TC1304 Shutdown Input Pin (SHDN)
SHDN is a logic-level input used to initiate the sequencing of the LDO output, then the buck regulator output. A logic-high (> 45% of VIN), will enable the regulator outputs. A logic-low (< 15% of VIN) will ensure that the outputs are turned off.
PG is an output level indicating that VOUT2 (LDO) is within 94% of regulation. The PG output is configured as a push-pull for the TC1303B and open-drain output for the TC1303A, TC1303C and TC1304.
3.6
Analog Ground Pin (AGND)
3.3
LDO Input Voltage Pin (VIN2)
AGND is the analog ground connection. Tie AGND to the analog portion of the ground plane (AGND). See the physical layout information in Section 5.0 "Application Circuits/Issues" for grounding recommendations.
VIN2 is a LDO power input supply pin. Connect variable input voltage source to VIN2. Connect VIN1 and VIN2 together with board traces as short as possible. VIN2 provides the input voltage for the LDO. An additional capacitor can be added to lower the LDO regulator input ripple voltage.
3.7
Buck Regulator Output Sense Pin (VFB/VOUT1)
For VOUT1 adjustable-output voltage options, connect the center of the output voltage divider to the VFB pin. For fixed-output voltage options, connect the output of the buck regulator to this pin (VOUT1).
(c) 2008 Microchip Technology Inc.
DS21949C-page 19
TC1303A/TC1303B/TC1303C/TC1304
3.8 Buck Regulator Shutdown Input Pin (SHDN1) 3.11 Power Ground Pin (PGND)
Connect all large-signal level ground returns to PGND. These large-signal, level ground traces should have a small loop area and length to prevent coupling of switching noise to sensitive traces. Please see the physical layout information supplied in Section 5.0 "Application Circuits/Issues" for grounding recommendations.
SHDN1 is a logic-level input used to turn the buck regulator on and off. A logic-high (> 45% of VIN), will enable the regulator output. A logic-low (< 15% of VIN) will ensure that the output is turned off.
3.9
Buck Regulator Input Voltage Pin (VIN1)
3.12
Exposed Pad (EP)
VIN1 is the buck regulator power input supply pin. Connect a variable input voltage source to VIN1. Connect VIN1 and VIN2 together with board traces as short as possible.
For the DFN package, connect the EP to AGND, with vias into the AGND plane.
3.10
Buck Inductor Output Pin (LX)
Connect LX directly to the buck inductor. This pin carries large signal-level current; all connections should be made as short as possible.
DS21949C-page 20
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
4.0
4.1
DETAILED DESCRIPTION
Device Overview
4.2.1
FIXED-FREQUENCY PWM MODE
The TC1303/TC1304 combines a 500 mA synchronous buck regulator with a 300 mA LDO and a power-good output. This unique combination provides a small, low-cost solution for applications that require two or more voltage rails. The buck regulator can deliver high-output current over a wide range of inputto-output voltage ratios while maintaining high efficiency. This is typically used for the lower-voltage, high-current processor core. The LDO is a minimal parts-count solution (single-output capacitor), providing a regulated voltage for an auxiliary rail. The typical LDO dropout voltage (137 mV @ 200 mA) allows the use of very low input-to-output LDO differential voltages, minimizing the power loss internal to the LDO pass transistor. A power-good output is provided, indicating that the buck regulator output, the LDO output or both outputs are in regulation. Additional features include independent shutdown inputs (TC1303), UVLO, output voltage sequencing (TC1304), overcurrent and overtemperature shutdown.
While operating in Pulse Width Modulation (PWM) mode, the TC1303/TC1304 buck regulator switches at a fixed, 2.0 MHz frequency. The PWM mode is suited for higher load current operation, maintaining low output noise and high conversion efficiency. PFM-toPWM mode transition is initiated for any of the following conditions: * Continuous inductor current is sensed * Inductor peak current exceeds 100 mA * The buck regulator output voltage has dropped out of regulation (step load has occurred) The typical PFM-to-PWM threshold is 80 mA.
4.2.2
PFM MODE
4.2
Synchronous Buck Regulator
The synchronous buck regulator is capable of supplying a 500 mA continuous output current over a wide range of input and output voltages. The output voltage range is from 0.8V (minimum) to 4.5V (maximum). The regulator operates in three different modes, automatically selecting the most efficient mode of operation. During heavy load conditions, the TC1303/TC1304 buck converter operates at a high, fixed frequency (2.0 MHz) using current mode control. This minimizes output ripple and noise (less than 8 mV peak-to-peak ripple) while maintaining high efficiency (typically > 90%). For standby or light load applications, the buck regulator will automatically switch to a powersaving Pulse Frequency Modulation (PFM) mode. This minimizes the quiescent current draw on the battery, while keeping the buck output voltage in regulation. The typical buck PFM mode current is 38 A. The buck regulator is capable of operating at 100% duty cycle, minimizing the voltage drop from input-to-output for wide input, battery-powered applications. For fixedoutput voltage applications, the feedback divider and control loop compensation components are integrated, eliminating the need for external components. The buck regulator output is protected against overcurrent, short circuit and overtemperature. While shut down, the synchronous buck N-channel and P-channel switches are off, so the LX pin is in a high-impedance state (this allows for connecting a source on the output of the buck regulator as long as its voltage does not exceed the input voltage).
PFM mode is entered when the output load on the buck regulator is very light. Once detected, the converter enters the PFM mode automatically and begins to skip pulses to minimize unnecessary quiescent current draw by reducing the number of switching cycles per second. The typical quiescent current for the switching regulator is less than 35 A. The transition from PWM to PFM mode occurs when discontinuous inductor current is sensed or the peak inductor current is less than 60 mA (typical). The typical PWM to PFM mode threshold is 30 mA. For low input-to-output differential voltages, the PWM-to-PFM mode threshold can be low due to the lack of ripple current. It is recommended that VIN1 be one volt greater than VOUT1 for PWM-to-PFM transitions.
4.3
Low Drop Out Regulator (LDO)
The LDO output is a 300 mA low-dropout linear regulator that provides a regulated output voltage with a single 1 F external capacitor. The output voltage is available in fixed options only, ranging from 1.5V to 3.3V. The LDO is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the regulator solution. The quiescent current consumed by the LDO output is typically less than 40 A, with a typical dropout voltage of 137 mV at 200 mA. While operating in Dropout mode, the LDO quiescent current will increase, minimizing the necessary voltage differential needed for the LDO output to maintain regulation. The LDO output is protected against overcurrent and overtemperature conditions.
(c) 2008 Microchip Technology Inc.
DS21949C-page 21
TC1303A/TC1303B/TC1303C/TC1304
4.4 Power-Good 4.5 Power Good Output Options
A Power-Good (PG) output signal is generated based off of the buck regulator output voltage (VOUT1), the LDO output voltage (VOUT2) or the combination of both outputs. A fixed delay time of approximately 262 ms is generated once the monitored output voltage is above the power-good threshold (typically 94% of VOUTX). As the monitored output voltage falls out of regulation, the falling PG threshold is typically 92% of the output voltage. The PG output signal is pulled up to the output voltage, indicating that power is good and pulled low, indicating that the output is out of regulation. The typical quiescent current draw for power-good circuitry is less than 10 A. If the monitored output voltage falls below the powergood threshold, the power-good output will transition to the Low state. The power-good circuitry has a 165 s delay when detecting a falling output voltage. This helps to increase the noise immunity of the power-good output, avoiding false triggering of the PG signal during line and load transients. There are three monitoring options for the TC1303 family. For the TC1303A, only the buck regulator output voltage (VOUT1) is monitored. The PG output signal depends only on VOUT1. For the TC1303B, only the LDO output voltage (VOUT2) is monitored. The PG output signal depends only on VOUT2. For the TC1303C and TC1304, both the buck regulator output voltage and LDO output voltage are monitored. If either one of the outputs fall out of regulation, the PG will be low. Only if both VOUT1 and VOUT2 are within the PG voltage threshold limits will the PG output be high. For the TC1303A,C and TC1304, the PG output pin is open drain and can be pulled up to any level within the given absolute maximum ratings (AGND - 0.3V) to (VIN + 0.3V).
TABLE 4-1:
Part Number
PG AVAILABLE OPTIONS
PG Output Buck (VOUT1) Yes No Yes Yes PG Output LDO (VOUT2) No Yes Yes Yes PG Output Type Open-Drain Push-Pull (VOUT2) Open-Drain Open-Drain
VTH_H VOUT1 or VOUT2
tRPU VOH
TC1303A TC1303B tRPD TC1303C TC1304
PG
VOL
FIGURE 4-1:
Power-Good Timing.
DS21949C-page 22
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
4.6 TC1304 Sequencing
The TC1304 device features an integrated sequencing option. A sequencing circuit using only the SHDN input, (Pin1), will turn on the LDO output (VOUT2) and delay the turn on of the Buck Regulator output (VOUT1) until the LDO output is in regulation. During power-down, the sequencing circuit will turn off the Buck Regulator output prior to turning off LDO output.
SHDN
VOUT2 Enable
+ -
160 s Delay*
92% of VOUT2
To PG Delay CKT.
VOUT1 Enable
+ -
160 s Delay*
92% of VOUT1
* 160 s delay on trailing edge
FIGURE 4-2:
TC1304 Sequencing Circuit.
4.7
TC1304 Power Up Timing From SHDN VIN1/VIN2
Soft Start
Both outputs of the TC1303/TC1304 are controlled during start-up. Less than 1% of VOUT1 or VOUT2 overshoot is observed during start-up from VIN rising above the UVLO voltage or either SHDN1 or SHDN2 being enabled.
SHDN 500 s VOUT1 tWK + tS VOUT2 300 ms Power Good
4.8
Overtemperature Protection
The TC1303/TC1304 has an integrated overtemperature protection circuit that monitors the device junction temperature and shuts the device off if the junction temperature exceeds the typical 165C threshold. If the overtemperature threshold is reached, the soft start is reset so that, once the junction temperature cools to approximately 155C, the device will automatically restart.
FIGURE 4-3: from SHDN.
TC1304 Power-up Timing
(c) 2008 Microchip Technology Inc.
DS21949C-page 23
TC1303A/TC1303B/TC1303C/TC1304
NOTES:
DS21949C-page 24
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
5.0
5.1
APPLICATION CIRCUITS/ ISSUES
Typical Applications
An additional VIN2 capacitor can be added to reduce high-frequency noise on the LDO input voltage pin (VIN2). This additional capacitor (1 F on page 5) is not necessary for typical applications.
The TC1303/TC1304 500 mA buck regulator + 300 mA LDO with power-good operates over a wide input voltage range (2.7V to 5.5V) and is ideal for single-cell LiIon battery-powered applications, USB-powered applications, three-cell NiMH or NiCd applications and 3V to 5V regulated input applications. The 10-pin MSOP and 3x3 DFN packages provide a small footprint with minimal external components.
5.4
Input and Output Capacitor Selection
5.2
Fixed Output Application
A typical VOUT1 fixed-output voltage application is shown in "Typical Application Circuits". A 4.7 F VIN1 ceramic input capacitor, 4.7 F VOUT1 ceramic capacitor, 1.0 F ceramic VOUT2 capacitor and 4.7 H inductor make up the entire external component solution for this dual-output application. No external dividers or compensation components are necessary. For this application, the input voltage range is 2.7V to 4.2V, VOUT1 = 1.5V at 500 mA, while VOUT2 = 2.5V at 300 mA.
As with all buck-derived dc-dc switching regulators, the input current is pulled from the source in pulses. This places a burden on the TC1303/TC1304 input filter capacitor. In most applications, a minimum of 4.7 F is recommended on VIN1 (buck regulator input voltage pin). In applications that have high source impedance, or have long leads, (10 inches) connecting to the input source, additional capacitance should be used. The capacitor type can be electrolytic (aluminum, tantalum, POSCAP, OSCON) or ceramic. For most portable electronic applications, ceramic capacitors are preferred due to their small size and low cost. For applications that require very low noise on the LDO output, an additional capacitor (typically 1 F) can be added to the VIN2 pin (LDO input voltage pin). Low ESR electrolytic or ceramic can be used for the buck regulator output capacitor. Again, ceramic is recommended because of its physical attributes and cost. For most applications, a 4.7 F is recommended. Refer to Table 5-1 for recommended values. Larger capacitors (up to 22 F) can be used. There are some advantages in load step performance when using larger value capacitors. Ceramic materials X7R and X5R have low temperature coefficients and are well within the acceptable ESR range required.
5.3
Adjustable Output Application
A typical VOUT1 adjustable output application is also shown in "Typical Application Circuits". For this application, the buck regulator output voltage is adjustable by using two external resistors as a voltage divider. For adjustable-output voltages, it is recommended that the top resistor divider value be 200 k. The bottom resistor divider can be calculated using the following formula:
TABLE 5-1:
TC1303A, TC1303B, TC1303C, TC1304 RECOMMENDED CAPACITOR VALUES
C(VIN2) none none COUT1 4.7 F 22 F COUT2 1 F 10 F
EQUATION 5-1:
R BOT Example: RTOP VOUT1 VFB RBOT RBOT = = = = = 200 k 2.1V 0.8V 200 k x (0.8V/(2.1V - 0.8V)) 123 k (Standard Value = 121 k) V FB = R TOP x ------------------------------- V OUT1 - V FB min max
C(VIN1) 4.7 F none
For adjustable-output applications, an additional R-C compensation is necessary for the buck regulator control loop stability. Recommended values are: RCOMP CCOMP = = 4.99 k 33 pF
(c) 2008 Microchip Technology Inc.
DS21949C-page 25
TC1303A/TC1303B/TC1303C/TC1304
5.5 Inductor Selection
TABLE 5-2:
For most applications, a 4.7 H inductor is recommended to minimize noise. There are many different magnetic core materials and package options to select from. That decision is based on size, cost and acceptable radiated energy levels. Toroid and shielded ferrite pot cores will have low radiated energy, but tend to be larger and higher is cost. With a typical 2.0 MHz switching frequency, the inductor ripple current can be calculated based on the following formulas.
TC1303A, TC1303B, TC1303C, TC1304 RECOMMENDED INDUCTOR VALUES
DCR MAX IDC (A) (MAX) 0.091 0.108 0.154 0.075 0.104 0.118 0.116 0.174 0.216 0.35 0.11 Size WxLxH (mm)
Part Number
Value (H)
Coiltronics(R) SD10 SD10 SD10 Coiltronics SD12 SD12 SD12 Sumida 2.2 3.3 4.7 2.2 3.3 4.7 4.7 4.7 1.80 5.2, 5.2, 1.2 max. 1.42 5.2, 5.2, 1.2 max. 1.29 5.2, 5.2, 1.2 max. 0.950 4.4, 5.8, 1.2 max. 0.770 4.4, 5.8, 1.2 max. 0.750 4.4, 5.8, 1.2 max. 1.0 3.8, 3.8, 2.74 max. 2.2 3.3 4.7 1.35 5.2, 5.2, 1.0 max. 1.24 5.2, 5.2, 1.0 max. 1.04 5.2, 5.2, 1.0 max.
EQUATION 5-2:
V OUT DutyCycle = ------------V IN Duty cycle represents the percentage of switch-on time.
Corporation(R)
CMD411 CMD411 CMD411 Coilcraft(R) 1008PS 1812PS
EQUATION 5-3:
1T ON = DutyCycle x --------F SW Where: FSW = Switching Frequency. The inductor ac ripple current can be calculated using the following relationship:
1.15 5.9, 5.0, 3.81 max
5.6
5.6.1
Thermal Calculations
BUCK REGULATOR OUTPUT (VOUT1)
EQUATION 5-4:
V L = L x -------Where: VL t = = voltage across the inductor (VIN - VOUT) on-time of P-channel MOSFET
I L t
The TC1303/TC1304 is available in two different 10-pin packages (MSOP and 3x3 DFN). By calculating the power dissipation and applying the package thermal resistance, (JA), the junction temperature is estimated. The maximum continuous junction temperature rating for the TC1303/TC1304 is +125C. To quickly estimate the internal power dissipation for the switching buck regulator, an empirical calculation using measured efficiency can be used. Given the measured efficiency (Section 2.0 "Typical Performance Curves"), the internal power dissipation is estimated below:
Solving for IL = yields:
EQUATION 5-5:
L I L = ----- x t
V L
When considering inductor ratings, the maximum DC current rating of the inductor should be at least equal to the maximum buck regulator load current (IOUT1), plus one half of the peak-to-peak inductor ripple current (1/ 2 * IL). The inductor DC resistance can add to the buck converter I2R losses. A rating of less than 200 m is recommended. Overall efficiency will be improved by using lower DC resistance inductors.
EQUATION 5-6: V OUT1 x I OUT1
------------------------------------- - ( V OUT1 x I OUT1 ) = P Dissipation Efficiency
The first term is equal to the input power (definition of efficiency, POUT/PIN = Efficiency). The second term is equal to the delivered power. The difference is internal power dissipation. This is an estimate assuming that most of the power lost is internal to the TC1303B. There is some percentage of power lost in the buck inductor, with very little loss in the input and output capacitors.
DS21949C-page 26
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
As an example, for a 3.6V input, 1.8V output with a load of 400 mA, the efficiency taken from Figure 2-8 is approximately 84%. The internal power dissipation is approximately 137 mW. returns are connected closely together at the PGND plane. The LDO optional input capacitor (CIN2) and LDO output capacitor COUT2 are returned to the AGND plane. The analog ground plane and power ground plane are connected at one point (shown near L1). All other signals (SHDN1, SHDN2, feedback in the adjustable-output case) should be referenced to AGND and have the AGND plane underneath them.
- Via
5.6.2
LDO OUTPUT (VOUT2)
The internal power dissipation within the TC1303/ TC1304 LDO is a function of input voltage, output voltage and output current. Equation 5-7 can be used to calculate the internal power dissipation for the LDO.
AGND to PGND
+VOUT1
L1
EQUATION 5-7:
P LDO = ( V IN ( MAX ) ) - V OUT2 ( MIN ) ) x I OUT2 ( MAX ) ) Where: PLDO = LDO Pass device internal power dissipation VIN(MAX) = Maximum input voltage VOUT(MIN) = LDO minimum output voltage The maximum power dissipation capability for a package can be calculated given the junction-toambient thermal resistance and the maximum ambient temperature for the application. The following equation can be used to determine the package's maximum internal power dissipation.
+VIN2 +VOUT2
COUT2
* CIN2 Optional COUT1 AGND CIN2 1 2 3 4 5
PGND 10 9 8 7 TC1303B 6 AGND Plane PGND Plane
CIN1
+VIN1
AGND
FIGURE 5-1: Component Placement, Fixed 10-Pin MSOP.
There will be some difference in layout for the 10-pin DFN package due to the thermal pad. A typical fixedoutput DFN layout is shown below. For the DFN layout, the VIN1 to VIN2 connection is routed on the bottom of the board around the TC1303/TC1304 thermal pad.
- Via
5.6.3
LDO POWER DISSIPATION EXAMPLE
Input Voltage VIN = 5V10% LDO Output Voltage and Current VOUT = 3.3V IOUT = 300 mA Internal Power Dissipation PLDO(MAX) = (VIN(MAX) - VOUT2(MIN)) x IOUT2(MAX) PLDO = (5.5V - 0.975 x 3.3V) x 300 mA PLDO = 684.8 mW
AGND to PGND
+VOUT1
* CIN2 Optional AGND COUT1 PGND CIN2 +VIN2 +VOUT2
COUT2 L1
1 2 3 4 5
5.7
PCB Layout Information
Some basic design guidelines should be used when physically placing the TC1303/TC1304 on a Printed Circuit Board (PCB). The TC1303/TC1304 has two ground pins, identified as AGND (analog ground) and PGND (power ground). By separating grounds, it is possible to minimize the switching frequency noise on the LDO output. The first priority, while placing external components on the board, is the input capacitor (CIN1). Wiring should be short and wide; the input current for the TC1303/TC1304 can be as high as 800 mA. The next priority would be the buck regulator output capacitor (COUT1) and inductor (L1). All three of these components are placed near their respective pins to minimize trace length. The CIN1 and COUT1 capacitor
10 9 8 7 6
PGND
CIN1
+VIN1
AGND
TC1303B PGND Plane AGND Plane
FIGURE 5-2: Component Placement, Fixed 10-Pin DFN.
(c) 2008 Microchip Technology Inc.
DS21949C-page 27
TC1303A/TC1303B/TC1303C/TC1304
5.8 Design Example
VOUT1 = 2.0V @ 500 mA VOUT2 = 3.3V @ 300 mA VIN = 5V10% L = 4.7H Calculate PWM mode inductor ripple current Nominal Duty Cycle = 2.0V/5.0V = 40% P-channel Switch-on time = 0.40 x 1/(2 MHz) = 200 ns VL = (VIN-VOUT1) = 3V IL = (VL/L) x TON = 128 mA Peak inductor current: IL(PK) = IOUT1+1/2IL = 564 mA Switcher power loss: Use efficiency estimate for 1.8V from Figure 2-8 Efficiency = 84%, PDISS1 = 190 mW Resistor Divider: RTOP = 200 k RBOT = 133 k LDO Output: PDISS2 = (VIN(MAX) - VOUT2(MIN)) x IOUT2(MAX) PDISS2 = (5.5V - (0.975) x 3.3V) x 300 mA PDISS2 = 684.8 mW Total Dissipation = 190 mW + 685 mW = 874 mW Junction Temp Rise and Maximum Ambient Operating Temperature Calculations 10-Pin MSOP (4-Layer Board with internal Planes) RJA = 113 C/Watt Junction Temp. Rise = 874 mW x 113 C/Watt = 98.8C Max. Ambient Temperature = 125C - 98.8C Max. Ambient Temperature = 26.3C 10-Pin DFN RJA = 41 C/Watt (4-Layer Board with internal planes and 2 vias) Junction Temp. Rise = 874 mW x 41 C/Watt = 35.8C Max. Ambient Temperature = 125C - 35.8C Max. Ambient Temperature = 89.2C This is above the +85C max. ambient temperature.
DS21949C-page 28
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Example: -- 1 = TC1303B -- 2 = TC1303A -- 3 = TC1303C -- 4 = TC1304 -- 1 = 1.375V VOUT1 -- H = 2.6V VOUT2 -- 0 = Default 10-Lead DFN XXXX YYWW NNN Example: 11H0 0831 256
10-Lead MSOP
XXXXXX YWWNNN
11H0E 831256
Second letter represents VOUT1 configuration: Code A B C D E F G H I VOUT1 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V Code J K L M N O P Q R VOUT1 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V 1.8V 1.7V 1.6V Code S T U V W X Y Z 1 VOUT1 1.5V 1.4V 1.3V 1.2V 1.1V 1.0V 0.9V Adj 1.375V
Third letter represents VOUT2 configuration: Code A B C D E F G H I VOUT2 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V Code J K L M N O P Q R VOUT1 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V 1.8V 1.7V 1.6V Code S T U V W X Y Z VOUT2 1.5V -- -- -- -- -- -- --
Fourth letter represents +50 mV Increments: Code 0 1 Default +50 mV to V1 Code 2 3 +50 mV to V2 +50 mV to V1 and V2
Legend: XX...X Y YY WW NNN
e3
* Note:
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2008 Microchip Technology Inc.
DS21949C-page 29
TC1303A/TC1303B/TC1303C/TC1304
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DS21949C-page 30
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
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(c) 2008 Microchip Technology Inc.
DS21949C-page 31
TC1303A/TC1303B/TC1303C/TC1304
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DS21949C-page 32
(c) 2008 Microchip Technology Inc.
TC1303A/1303B/1303C/1304
APPENDIX A: REVISION HISTORY
Revision C (December 2008)
The following is the list of modifications: 1. Updated Package Types diagram and Section 3.0 "Pin Descriptions" to show the Exposed Thermal Pad (EP) information. Updated Section 6.0 "Packaging Information".
2.
Revision B (July 2005)
The following is the list of modifications: 1. Added information on TC1303A, TC1303C and TC1304 throughout data sheet.
Revision A (June 2005)
* Original Release of this Document.
(c) 2008 Microchip Technology Inc.
DS21949C-page 33
TC1303A/1303B/1303C/1304
NOTES:
DS21949C-page 34
(c) 2008 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. TC1303 XX X X X XX Package XX Tube or Tape & Reel Examples:
a) b) c) TC1303A-SI0EMF: TC1303A-ZA0EUN: TC1303A-PP3EMFTR: 1.5V, 2.5V, Default, 10LD DFN pkg. Adj, 3.3V, Default, 10LD MSOP pkg. 1.8V, 1.8V, +50 mV, 10LD DFN pkg. Tape and Reel
Type VOUT1 VOUT2 +50 mV Temp Increments Range B
Device:
TC1303A: TC1303B: TC1303C: TC1304: Code A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 1
PWM/LDO combo with Power-Good PWM/LDO combo with Power-Good PWM/LDO combo with Power-Good PWM/LDO combo with Power-Good VOUT1 Code A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 1 VOUT2 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V 1.8V 1.7V 1.6V 1.5V Code 0 1 2 3 +50 mV Default +50 mV to V1 +50 mV to V2 +50 mV to V1 and V2
a) b) c) d) e) f) g) h) i)
Options
3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V 1.8V 1.7V 1.6V 1.5V 1.4V 1.3V 1.2V 1.1V 1.0V 0.9V Adjustable 1.375V
1.375V, 2.6V, Default, 10LD DFN pkg. TC1303B-AG0EUN: 3.3V, 2.7V, Default, 10LD MSOP pkg. TC1303B-AD0EMF: 3.3V, 3.0V, Default, 10LD DFN pkg. TC1303B-IA0EUN: 2.5V, 3.3V, Default, 10LD MSOP pkg. TC1303B-IA0EMF: 2.5V, 3.3V, Default, 10LD DFN pkg. TC1303B-PF0EUN: 1.8V, 2.8V, Default, 10LD MSOP pkg. TC1303B-PF0EMF: 1.8V, 2.8V, Default, 10LD DFN pkg. TC1303B-PG0EUN: 1.8V, 2.7V, Default, 10LD MSOP pkg. TC1303B-DG0EMFTR: 3.0V, 2.7V, Default, 10LD DFN pkg. Tape and Reel TC1303C-VP0EMF: TC1303C-VP0EMFTR: 1.2V, 1.8V, Default, 10LD DFN pkg. 1.2V, 1.8V, Default, 10LD DFN pkg. Tape and Reel. 1.2V, 2.5V, Default, 10LD DFN pkg. 1.2V, 1.8V, Default, 10LD DFN pkg. 1.2V, 2.5V, Default, 10LD MSOP pkg. 1.2V, 2.5V, Default, 10LD DFN pkg. Tape and Reel. 1.2V, 1.8V, Default 10LD DFN pkg. Tape and Reel. 1.2V, 2.5V, Default, 10LD MSOP pkg. Tape and Reel.
TC1303B-1H0EMF:
a) b)
a) b) c) d) e)
TC1304-VI0EMF: TC1304-VP0EMF: TC1304-VI0EUN: TC1304-VI0EMFTR: TC1304-VP0EMFTR: TC1304-VI0EUNTR:
* Contact Factory for Alternate Output Voltage and Reset Voltage Configurations.
Temperature Range: Package:
E
= -40C to +85C f)
MF UN
= Dual Flat, No Lead (3x3 mm body), 10-lead = Plastic Micro Small Outline (MSOP), 10-lead = Tube = Tape and Reel
Tube or Blank Tape and Reel: TR
(c) 2008 Microchip Technology Inc.
DS21949C-page 35
TC1303A/TC1303B/TC1303C/TC1304
NOTES:
DS21949C-page 36
(c) 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC, SmartShunt and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2008, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2008 Microchip Technology Inc.
DS21949C-page 37
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049
ASIA/PACIFIC
India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350
EUROPE
Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
01/02/08
DS21949C-page 38
(c) 2008 Microchip Technology Inc.

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